Why the adoption of QLC flash is now benefiting the business
Once considered unsuitable for anything but cheap USB flash drives, QLC flash technology has become a more viable option for enterprise SSDs.
Business adoption of four-tier solid-state drives (QLC) is driven by a number of factors. These include the emergence of 3D NAND, more sophisticated controllers, and the fact that IT administrators now have a better understanding of storage workload requirements. Together, these factors allow for wider use of less reliable flash technology in cases where force is not important.
3D NAND makes QLC business-ready
3D NAND has made a very dramatic change to NAND flash. In the past, with planar NAND, the binary cell size decreased, usually by a factor of four, with each new generation of processes.
QLC flash was not widely available in any planar generation for a simple reason. When planar flash chips were migrated to a new process node, they were initially introduced with relaxed specifications. In previous generations this would have been SLC, and at around 25nm it became MLC. After much characterization – and once the manufacturing process became very stable – the industry took the next step, with SLC chips forming the basis of MLC chips and chips that started out as TLC counterparts spawning MLC.
The QLC flash would be a natural next step in the cost reduction process, with a cost advantage of around 20% over its TLC counterparts, but it could be a few years after the introduction of the original MLC part. . At that time, the next generation flat part would have been introduced, which would be even less expensive to produce than the previous generation QLC part. The QLC part was always a little too late to make any economic sense.
When 3D NAND was introduced, the rules changed. First, 3D NAND has a gate – the storage element in a memory chip – which is about 35 times larger than that of 15nm planar NAND. This allows 3D NAND to store proportionally more electrons, making it easier to detect a QLC bit in 3D NAND than a TLC bit on 15nm planar NAND.
Second, most 3D NAND uses a charge trap for storage, as opposed to the floating gate used in planar NAND flash. A charge trap stores more electrons.
Finally, the gate size of 3D NAND does not change from one number of layers to another, so characterization at each new process node for planar NAND is not required for 3D NAND. Instead, IT can focus on moving from MLC to TLC to QLC smoothly, and almost regardless of the number of layers. This has also led vendors to explore the possibility of a penta-level cell NAND flash, with 5 bits per cell, which is unimaginable with planar NAND.
Treat QLC as SLC
For the above reasons, QLC flash has become a more viable, manufacturable, and reasonable choice for enterprise systems. However, compared to MLC and TLC, QLC is slower, has more bit errors, and offers lower endurance. However, there are ways to overcome these obstacles.
Modern controllers use a lot of tricks to hide the fact that NAND flash memory has an incredibly slow write speed. One of those tricks is to tell the NAND flash chip to temporarily treat certain areas as SLC flash, allowing them to absorb data much faster than they could if they behave like a QLC.
The only difference between SLC, MLC, TLC, and QLC bit cells is the number of voltages programmed into them – they are all the same type of transistor. This means IT teams can arbitrarily tell them to act as SLC, MLC, TLC, or QLC, a capability that today’s high-end controllers offer.
Between that and a number of older tricks, a controller can mask the differences between the speed and endurance of QLC and that of SLC flash.
The importance of controllers
The industry has reached a point where QLC flash makes sense, in large part because a reasonably priced controller can handle this not-so-nice flash well enough to meet the needs of corporate computer systems.
Moore’s Law has the same effect on logic as it does on memory: prices invariably fall over time. This means that if an SSD at a certain price includes a $ 1 controller, or a $ 10 controller, or a $ 100 controller, the processing power of that controller increases exponentially over time. This automatically leads to better performance of SSDs one way or another. One way they work better is by allowing them to handle worse NAND flash than previous generation controllers.
Other advances in the controller include the evolution of error correction from Hamming codes to Reed-Solomon to BCH, and then to low density parity check codes. The controllers also use improved algorithms, and even AI, to manage the SSD, and adapt and optimize operations under different workloads.
Enterprise SSD users understand their workloads
Slow but steady changes have occurred since the appearance of SSDs in the storage market.
At first, admins didn’t know much about their workloads and were unpleasantly surprised when an SSD wore out sooner than expected. The tools did not exist to help administrators understand what type of traffic was presented to the SSD. To make matters worse, application programs and even operating systems weren’t optimized to reduce hard drive storage because hard drives had no wear issues.
The first response to this was to demand SSDs with ever increasing endurance. Some SSD manufacturers have used SLC flash for its extended life, while others have doubled or even tripled the amount of flash in the drive, making only a third of the flash visible to the system. These dramatic steps may have drastically increased SSD costs, but they have delivered SSDs with endurance levels of up to 25 disk writes per day (DWPD).
Over time, this trend reversed: Administrators began to understand their workloads, application programs and operating systems began to consider flash memory wear and tear, and High write load areas have been separated from those with little or no writes, allowing systems with multiple SSDs to use a mixed set of SSDs suited to their workload. Admins were content to save money by purchasing SSDs specified at 1 DWPD or less.